现代电子技术Issue(24)：128-131,4.DOI:10.16652/j.issn.1004-373x.2015.24.037
一种CMOS新型ESD保护电路设计
Design of a new ESD protection circuit for CMOS device
摘要
Abstract
The scaling technology of the metal oxide semiconductor(MOS)device makes the integrated circuit chips face with serious electrostatic discharge (ESD) threats,and the problems of limited anti⁃static electricity capacity and occupying large chip area exist in the current used ESD protection circuit because of current crowding effect. According to ESD protection mechanism of the whole chip,a new ESD protection circuit was designed and implemented based on SMIC 0.18 μm technology, which has simple structure,small chip occupation area and strong capacity of anti⁃static electricity. The test results of the cir⁃cuit show that,in comparison with the ESD protection circuit with same size and gate⁃grounded structure,the new ESD protec⁃tion circuit can reduce the chip area by 35% while the anti⁃ESD breakdown voltage is increased by 32%. The circuit can effec⁃tively protect the internal circuits in the chip from ESD damage and reduce the cost of ESD protection circuit.关键词
静电放电(ESD)保护/栅极接地NMOS/抗静电/电流集边效应/低成本Key words
ESD protection/gate-grounded nMOS/anti-static electricity/current crowding effect/low cost分类
信息技术与安全科学引用本文复制引用
沈放,陈巍,黄灿英,陈艳..一种CMOS新型ESD保护电路设计[J].现代电子技术,2015,(24):128-131,4.基金项目
江西省教育改革课题（JXJG-11-22-2）；江西省教育改革课题（JXJG-13-28-6）；江西省教育改革课题（JXJG-14-28-8）；江西省教育厅青年科学基金项目（GJJ12165）；江西省教育教学“十二五”规划课题 （）
