电子器件Issue(6)：1312-1315,4.DOI:10.3969/j.issn.1005-9490.2015.06.021
高速低功耗双尾比较器的设计
Design of High Speed Low Power Double Tail Comparator
任志德 1郭春生1
作者信息
- 1. 北京工业大学电子信息与控制工程学院，北京100124
- 折叠
摘要
Abstract
In order to optimize the speed and power of comparator,a new double tail comparator has been proposed based on an existing one.We increase the speed of the comparator by additional positive feedback path of cross-cou⁃pling. But the number of branches of the power to the ground the number of devices in the circuit are reduced to save power consumption.Simulation results show that the maximum operating frequency can be processed from the original 1.7 GHz to 2.5 GHz. The power consumption can be saved significantly with the increasing operating fre⁃quency.When the operating frequency is at 1.7 GHz,the consumption can save on 41.45%,and power delay product can increase 62.33%. The proposed two-tailed comparator is more suitable for high-speed,low-power analog-to-digi⁃tal conversion circuit.关键词
模拟电路设计/双尾比较器/优化设计/高速/低功耗Key words
analog circuit design/double tail comparator/optimization/high speed/low power分类
信息技术与安全科学引用本文复制引用
任志德,郭春生..高速低功耗双尾比较器的设计[J].电子器件,2015,(6):1312-1315,4.
