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Design of power balance SRAM for DPA-resistance

Zhou Keji Wang Pengjun Wen Liang

半导体学报（英文版）2016，Vol.37Issue(4)：106-112,7.

半导体学报（英文版）2016，Vol.37Issue(4)：106-112,7.DOI:10.1088/1674-4926/37/4/045002

Design of power balance SRAM for DPA-resistance

Zhou Keji ¹Wang Pengjun ¹Wen Liang²

作者信息

1. Institute of Circuits and Systems, Ningbo University, Ningbo 315211, China
2. State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, China
折叠

摘要

关键词

differential power analysis (DPA)/static random access memory (SRAM)/power balance/information security

Key words

differential power analysis (DPA)/static random access memory (SRAM)/power balance/information security

引用本文复制引用

Zhou Keji,Wang Pengjun,Wen Liang..Design of power balance SRAM for DPA-resistance[J].半导体学报（英文版）,2016,37(4):106-112,7.

基金项目

Project supported by the Zhejiang Provincial Natural Science Foundation of China (No.LQ14F040001),the National Natural Science Foundation of China (Nos.61274132,61234002),and the K.C.Wong Magna Fund in Ningbo University,China. （No.LQ14F040001）

半导体学报（英文版）

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ISSN：1674-4926

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