电子器件2016，Vol.39Issue(2)：370-373,4.DOI:10.3969/j.issn.1005-9490.2016.02.025
基于FPGA的IRIG-B（AC）时间码解码器的设计
Design of FPGA-Based IR IG-B(AC)Time Code Decoder
摘要
Abstract
In order to solve the IRIG-B(AC)decoding low accuracy problems and improve the stability of the demod⁃ulation system,a high-performance decoder is presented useing FPGA implementation demodulation IRIG-B(AC) codes.By calling the FPGA IP core generation multipliers and FIR low-pass filter,the AC components in the B(AC) code are filtered,then demodulated according to their amplitude.The decoder can demodulate time information of IRIG-B(AC)code accurately,transmit it quickly,and outputs the second pulse which is corresponding with time in⁃formation,through the output port to the demodulated PC display. Through extensive testing the decoder shows its accuracy,stability,and meets the requirements of various applications for IRIG-B(AC)code of timing.关键词
IRIG-B码/解码/滤波/A/D转换/秒脉冲Key words
IRIG-B code/decoding/filtering/A/D conversion/the second pulse分类
信息技术与安全科学引用本文复制引用
贾磊,崔永俊,杨兵,王晋伟..基于FPGA的IRIG-B（AC）时间码解码器的设计[J].电子器件,2016,39(2):370-373,4.基金项目
国家自然科学基金项目 （）
