桂林电子科技大学学报2016，Vol.36Issue(2)：99-103,5.
一种高速高精度的开环CMO S采样保持电路
A high-speed and high-resolution open-loop CMOS sample and hold circuit
摘要
Abstract
In order to improve the nonlinearity caused by switch changing with the input signal amplitude,an open-loop sam-ple and hold circuit based on a gate voltage bootstrapped switch with auxiliary capacitor is proposed.Double capacitance sampling method is adopted to eliminate the charge inj ection effect.And the input switch with traditional double capacitance structure is replaced by a grid bootstrapped switch,the input switch conduction resistance is effectively reduced,which makes conduction resistance independent of the input signal and improves the linearity of the circuit.The circuit is fabricated in SMIC 0.18μm CMOS process.Simulation results show that the improved circuit spurious-free-dynamic range is 92.49 dB,signal-to-noise ratio is 124.98 dB,the effective number of bit is 14.98 bit on the condition that 40 MHz input signal at 500 MHz sample frequency and 1.8 V supply voltage.关键词
采样保持电路/辅助电容/电荷注入效应/自举开关Key words
sample and hold circuit/auxiliary capacitance/charge inj ection effect/bootstrap switch分类
信息技术与安全科学引用本文复制引用
唐小丽,段吉海,徐卫林,向指航..一种高速高精度的开环CMO S采样保持电路[J].桂林电子科技大学学报,2016,36(2):99-103,5.基金项目
国家自然科学基金(61161003,61264001,61166004) （61161003,61264001,61166004）
广西自然科学基金(2013GXNSFAA019333) （2013GXNSFAA019333）
