计算机技术与发展2016，Vol.26Issue(6)：183-185,3.DOI:10.3969/j.issn.1673-629X.2016.06.041
SoC芯片中SRIO接口的FPGA验证平台设计验证
Design and Verification of SRIO in SoC Based on FPGA
摘要
Abstract
SRIO interface is based on serial packet switch protocol. High-performance embedded CPU with SRIO interface is widely used in avionics embedded system. The verification of SRIO interface is particularly important for the design of the system. A reliable and com-plete verification platform for SRIO interface is very important. Based on the understanding of RapidIO protocol in this paper,a FPGA verification platform is designed and implemented based on SoC,planing functional test point and accomplishing the verification of SRIO IP core. The verification platform described in this paper can test SRIO interface with different line rates,different line width,and different package types. The content of the test has been covered by the SRIO protocol.关键词
SRIO/FPGA平台/设计/验证Key words
SRIO/FPGA platform/design/verification分类
信息技术与安全科学引用本文复制引用
曹朋朋,田泽,赵强,李攀,王泉..SoC芯片中SRIO接口的FPGA验证平台设计验证[J].计算机技术与发展,2016,26(6):183-185,3.基金项目
航空科学基金(2015ZC51036) （2015ZC51036）
