现代电子技术2016，Vol.39Issue(11)：55-58,62,5.DOI:10.16652/j.issn.1004-373x.2016.11.014
基于FPGA的高速高阶FIR滤波器的频域改进方法
Frequency domain improvement method for high-speed and high-order FIR filter based on FPGA
郭晓伟 1陈钟荣 2夏利娜1
作者信息
- 1. 中国气象局 气溶胶-云-降水重点开放实验室，江苏 南京 210044
- 2. 南京信息工程大学 大气物理学院，江苏 南京 210044
- 折叠
摘要
Abstract
To implement the real⁃time data processing of using ultrahigh⁃order finite impulse response(FIR)filter designed with field⁃programmable gate array(FPGA),an improved method of FIR filter designed in frequency domain is put forward. The problem that the data can′t be processed in real time,caused by the zero padding time consumption,was solved for processing the convolution operation in frequency domain. A long sequence is divided into the subsequences with fixed length,and then the subsequence is processed with two FFT(fast Fourier transform)IPs instead of the conventional scheme with one FFT IP. By con⁃trolling the time difference between the two input FFT IPs,the principle of overlapping addition method can be utilized to add the results to obtain the convolution result after subsequences convolution,thus real⁃time processing of the signal is achieved. The instance simulation results show that the proposed frequency domain implementation method can reduce the FPGA resource consumption,eliminate the zero padding delay in the available technologies,and improve the processing speed.关键词
FIR滤波器/快速傅里叶变换/FPGA/频域改进方法Key words
FIR filter/fast Fourier transform/FPGA/frequency domain improvement method分类
信息技术与安全科学引用本文复制引用
郭晓伟,陈钟荣,夏利娜..基于FPGA的高速高阶FIR滤波器的频域改进方法[J].现代电子技术,2016,39(11):55-58,62,5.
