计算机工程与应用2016，Vol.52Issue(12)：1-4,52,5.DOI:10.3778/j.issn.1002-8331.1407-0261
μC/OS-II二级调度算法的硬件实现
Hardware implementation of two-level scheduling algorithm ofμC/OS-II
摘要
Abstract
Aiming at the problem thatμC/OS-II does not support round-robin scheduling of the same priority task, a two-level hybrid task scheduling strategy is proposed. In the first level, by putting the task priority as criterion for task scheduling, a preemptive scheduling of different priority task is implemented. And in the second level, adopting time slice circular scheduling strategy, round-robin scheduling of same priority task is implemented. The waiting list of tasks is designed by on-chip registers of FPGA and the ready list of tasks is designed by RAM of FPGA, and to implement time slice circular scheduling, hardware circuit for finding successor of task is designed. The system adopts VHDL, and is simulated by the software ISE10.1. The simulation results show that the hardware implementation of the system is well-worked.关键词
实时操作系统/时间片轮转调度/硬件任务调度器/现场可编程门阵列Key words
real-time operating system/time slice circular scheduling/hardware task scheduler/Field Programmable Gate Array(FPGA)分类
信息技术与安全科学引用本文复制引用
李岩,崔浩鑫,杜永斌..μC/OS-II二级调度算法的硬件实现[J].计算机工程与应用,2016,52(12):1-4,52,5.基金项目
哈尔滨市优秀学科带头人基金（No.2013RFXXJ034）；黑龙江省自然科学基金（No.F2015038）；黑龙江省教育厅基金（No.12521100）。 （）
