半导体学报（英文版）2016，Vol.37Issue(5)：69-77,9.DOI:10.1088/1674-4926/37/5/055001
DOIND: a technique for leakage reduction in nanoscale domino logic circuits
DOIND: a technique for leakage reduction in nanoscale domino logic circuits
Ambika Prasad Shah 1Vaibhav Neema 1Shreeniwas Daulatabad2
作者信息
- 1. Electronics & Telecommunication Engineering Department, IET-Devi Ahilya University, Indore-452017, India
- 2. Electrical Engineering Department, Indian Institute of Technology, Bombay-400076, India
- 折叠
摘要
关键词
deep submicron/DOIND logic/domino logic/evaluation/precharge/subthreshold leakageKey words
deep submicron/DOIND logic/domino logic/evaluation/precharge/subthreshold leakage引用本文复制引用
Ambika Prasad Shah,Vaibhav Neema,Shreeniwas Daulatabad..DOIND: a technique for leakage reduction in nanoscale domino logic circuits[J].半导体学报（英文版）,2016,37(5):69-77,9.
