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PCI总线硬件故障容错技术研究

蒋欣 唐超 白晨

现代电子技术2016,Vol.39Issue(14):35-38,4.
现代电子技术2016,Vol.39Issue(14):35-38,4.DOI:10.16652/j.issn.1004-373x.2016.14.010

PCI总线硬件故障容错技术研究

Error tolerance technology for PCI bus hardware fault

蒋欣 1唐超 2白晨1

作者信息

  • 1. 中航工业 西安航空计算技术研究所,陕西 西安 710068
  • 2. 驻六三一所军事代表室,陕西 西安 710068
  • 折叠

摘要

Abstract

Since the PCI bus belongs to the parallel bus,a PCI device fault may occur or cause failure of response signal generation,which may result in paralysis of the entire PCI bus system during data transmission. That is why FPGA is used to realize the error⁃tolerant technology for PCI bus hardware fault to ensure that the PCI bus can recover its transmission function while the bus device occurs incidents or equipment has no response signal,and shield the PCI devices with fault effectively.

关键词

PCI总线/硬件故障/容错技术/数据传输

Key words

PCI bus/hardware fault/error tolerance technology/data transmission

分类

信息技术与安全科学

引用本文复制引用

蒋欣,唐超,白晨..PCI总线硬件故障容错技术研究[J].现代电子技术,2016,39(14):35-38,4.

基金项目

航空科学基金项目 ()

现代电子技术

OA北大核心CSTPCD

1004-373X

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