现代电子技术2016，Vol.39Issue(15)：115-118,4.DOI:10.16652/j.issn.1004-373x.2016.15.029
一种自适应训练的BP神经网络FPGA设计
FPGA-based design of BP neural network with adaptive training
摘要
Abstract
Using software for neural network has the disadvantages of low parallelism and slow speed,the hardware design resource utilization of the traditional neural network is high,and the network training is uncontrollable. To solve these prob⁃lems,a new FPGA⁃based design method of back propagation(BP)neural network is proposed. The method can realize the Sig⁃moid excitation function through piecewise linear fitting and nonlinear fitting based on symmetry,and uses the finite state ma⁃chine(FSM)to accomplish the training times adaption based on error. The Verilog HDL language is used to design the 1⁃3⁃1 BP neural network to approximate the function y=cos x. The resource occupancy of the network is 2 756 LEs,the training times are 1 583,the average relative error of the network test sample is 0.6%,and the maximum clock frequency is 82.3 MHz. The verification results show that the neural network designed with the method has the advantages of less resource occupancy, high accuracy and fast running speed,and can control the network training automatically.关键词
FPGA/BP神经网络/线性拟合/非线性拟合/自适应训练Key words
FPGA/BP neural network/linear fitting/nonlinear fitting/adaptive training分类
信息技术与安全科学引用本文复制引用
王蒙,常胜,王豪..一种自适应训练的BP神经网络FPGA设计[J].现代电子技术,2016,39(15):115-118,4.基金项目
国家自然科学基金（61204096，61404094，61574102）；湖北省科技支撑计划 （）
