计算机与数字工程2016，Vol.44Issue(9)：1836-1841,6.DOI:10.3969/j.issn.1672-9722.2016.09.044
基于 SoC FPGA 的中频数字接收机设计与实现磁
Design and Realization of the IF Digital Receiver Based on SoC FPGA
刘丹 1龚晓峰1
作者信息
- 1. 四川大学电气信息学院 成都 610000
- 折叠
摘要
Abstract
In order to reduce the volume of broadband IF receiver ,a design based on Altera SoC architecture Cyclone V series chips is put forward .This design realizes through the method of software and hardware coordination .Circuit design integrates DDR3 memory chip ,GPS chip and other peripheral circuits .In the part of FPGA ,the scan ,single package or con‐tinue sampling of IF signal ,DDC ,spectrum analysis are realized .In the part of ARM ,ITU parameter measurement ,audio demodulation ,field density calculation and so on in Linux system are realized .The FPGA and ARM integrate on SoC trans‐mit data by AXI bus ,data rate between them reaches 7 .2Gb/s .Therefore ,it ensures the continuity and real‐time of data .关键词
SoC/FPGA/HPS/数字中频接收机Key words
SoC/field programmable gate array/hard processor system/digital intermediate frequency receiver分类
信息技术与安全科学引用本文复制引用
刘丹,龚晓峰..基于 SoC FPGA 的中频数字接收机设计与实现磁[J].计算机与数字工程,2016,44(9):1836-1841,6.
