兵工自动化2016，Vol.35Issue(9)：31-34,40,5.DOI:10.7690/bgzdh.2016.09.007
基于FPGA+DSP架构异步FIFO视频图像数据采集实现
Realization Video-image-data Acquisition and Accomplish Based on FPGA+DSP Framework Asynchronous FIFO
李波 1李亚南 1李健1
作者信息
- 1. 西南自动化研究所信控中心，四川绵阳 621000
- 折叠
摘要
Abstract
For those FPGA chips which lack of internal storage resource and the metastability problem that the data transferred between the different clock domains. A method was designed to acquire the video image data based on FPGA+DSP framework. Under the effect of IIC configuration module and de-interleave module, by through desiring 3 lower depth asynchronous FIFO realized video-data stream’s transfer between the different clock domain, the data written into FIFO at send clock domain and read at received clock domain, it realized the data transfer and acquire simultaneously. By analysis the utilization of the FPGA chip resource and carry on a system test, the result of test have shown that the system can accurately re-appear the input video image and realize the real time video data acquisition.关键词
FPGA/异步FIFO/视频图像采集Key words
FPGA/asynchronous FIFO/video image acquisition分类
信息技术与安全科学引用本文复制引用
李波,李亚南,李健..基于FPGA+DSP架构异步FIFO视频图像数据采集实现[J].兵工自动化,2016,35(9):31-34,40,5.
