雷达科学与技术2016，Vol.14Issue(5)：526-530,5.DOI:10.3969/j.issn.1672-2337.2016.05.014
一种高速数据采集系统的设计与实现
Design and Implementation of High Speed Data Acquisition System
杨宇宸 1向海生1
作者信息
- 1. 中国电子科技集团公司第三十八研究所，安徽合肥 230088
- 折叠
摘要
Abstract
In order to meet the requirements of the verification of the key technologies of a spaceborne SAR radar,a high speed data acquisition system is designed and implemented.The system is composed of da-ta acquisition extension and grapher.Data acquisition extension adopts the COTS(commercial-off-the-shelf) devices and standard FMC(FPGA mezzanine card)architecture.The mother card is a general signal process-ing board with rich interfaces.The daughter card is a signal acquisition card which can be changed flexibly. The grapher uses the optical fiber communicating with the data acquisition extension.It owns a high-capacity DDR3 for high-speed data caching,and transfers data to computer with PCI-E bus.The system completed data acquisition in the flight test and the results verified the correctness and feasibility of the design scheme.关键词
可编程门阵列/高速数据采集/宽带/多通道Key words
field programmable gate array(FPGA)/high speed data acquisition/wideband/multi-channel分类
信息技术与安全科学引用本文复制引用
杨宇宸,向海生..一种高速数据采集系统的设计与实现[J].雷达科学与技术,2016,14(5):526-530,5.
