现代电子技术2016，Vol.39Issue(21)：99-102,4.DOI:10.16652/j.issn.1004-373x.2016.21.024
DRFM硬件平台的研究与实现
Research and implementation of hardware platform for DRFM
摘要
Abstract
The hardware platform of DRFM was studied and designed. A DRFM system implementation scheme is pro-posed,which takes FPGA+ADC+DAC as its core. According to the top-to-down design principle,the implementation process of the hardware system from top layer architecture to bottom layer circuit is introduced in detail,and hardware circuit design of each functional module is analyzed in detail. The hardware system of DRFM was tested. The test results show that the spurious level is only -70 dBc when the bandwidth of the DRFM system is 1.2 GHz and the frequency of input signal is within 100 MHz~1.2 GHz,the system can simulate the radar echo signal,and realize the anticipated effect.关键词
数字射频存储器/FPGA/硬件设计/射频仿真Key words
digital radio frequency memory/FPGA/hardware design/RF simulation分类
信息技术与安全科学引用本文复制引用
潘启勇,张静亚,王宜怀..DRFM硬件平台的研究与实现[J].现代电子技术,2016,39(21):99-102,4.基金项目
国家自然科学基金项目:无线传感网络中紧急事件信息分发的可靠性研究(61070169)资助 （61070169）
