移动通信2016，Vol.40Issue(20)：77-83,7.DOI:10.3969/j.issn.1006-1010.2016.20.015
D-BL AST基带系统的FPGA实现研究
Research on FPGA Implementation of D-BLAST Base-Band System
黄虎 1孔勇 2李华 3孙乐4
作者信息
- 1. 中国运载火箭技术研究院研究发展中心，北京 100076
- 2. 北京中测安华科技有限公司，北京 100085
- 3. 中国电子科技集团公司第五十八研究所，江苏 无锡 214072
- 4. 中国联合网络通信有限公司网络技术研究院，北京 100048
- 折叠
摘要
Abstract
A MIMO D-BLAST codec algorithm iftted for FPGA implementation was designed. A 3×3 MIMO D-BLAST base-band processing system on the Xilinx Virtex4-VC4VSX55 test-bed was developed based on Verilog hardware description language. The BER performance of the 3×3 D-BLAST was simulated by FPGA implementation where two detection algorithms, ZF-SIC and MMSE-SIC, were adopted respectively. Simulation analysis and experimental results show the correctness and efifciency of the FPGA D-BLAST base-band processing system. It also shows that the BER performance of D-BLAST is better than V-BLAST under the same condition.关键词
多输入多输出/对角分层空时编码/串行干扰抵消/现场可编程门阵列/误码率Key words
MIMO/D-BLAST/successive interference cancellation/FPGA/BER分类
信息技术与安全科学引用本文复制引用
黄虎,孔勇,李华,孙乐..D-BL AST基带系统的FPGA实现研究[J].移动通信,2016,40(20):77-83,7.
