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基于CAN总线的单主时钟同步方法研究∗

季霆

微型机与应用2016,Vol.35Issue(24):61-65,69,6.
微型机与应用2016,Vol.35Issue(24):61-65,69,6.DOI:10.19358/j.issn.1674-7720.2016.24.018

基于CAN总线的单主时钟同步方法研究∗

Research of single master clock synchronization mechanism based on CAN bus

季霆1

作者信息

  • 1. 南通大学 电气工程学院,江苏 南通226000
  • 折叠

摘要

Abstract

High precision and high reliability clock synchronization mechanism is the key to the safe operation of CAN bus. This paper aims at characteristic of master-slave clock synchronization and consultation selection clock synchronization, and proposes a single master clock syn-chronization mechanism based on CAN bus . This mechanism only needs one master synchronization node to achieve the reliable operation of the CAN bus. Estimating the value of instant deviation using clock characteristics of CAN bus can make each node of the bus work properly when slave clock node is invalid. And in order to select a new master synchronization node, the concept of clock variance is introduced to up-date master clock synchronization priority table. Finally it makes a simulation using CANoe and builds a hardware experimental platform using MCS-51, SJA1000T and TJA1050. The results show that the mechanism can prevent single node failure and be more reliable.

关键词

时钟同步/即时偏差/主时钟选择/时钟方差

Key words

clock synchronization/instant deviation/master clock selection/clock variance

分类

交通运输

引用本文复制引用

季霆..基于CAN总线的单主时钟同步方法研究∗[J].微型机与应用,2016,35(24):61-65,69,6.

基金项目

南通大学教学改革课题(2015C01) (2015C01)

微型机与应用

2097-1788

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