电子器件2017，Vol.40Issue(1)：113-117,5.DOI:10.3969/j.issn.1005-9490.2017.01.022
基于FPGA和LVDS的弹载数据回读系统设计∗
Designing of Readout System for Missile-Loaded Data Based on FPGA and LVDS
摘要
Abstract
For on-board data back to the reading process, the parallel data transmission is difficult to complete synchronization clock at the same time,and the interaction between the parallel cable crosstalks,caused the parallel data read back cable length is generally limited to a few centimeters,so it needs to design a readout system for missile-loaded data based on FPGA and LVDS. The system designed the FPGA as the core,used the FT245BL as the control chip of USB,and adopted the LVDS technique that combined interface solution string and the drive chip. The combi-nation of effective remote data transceiver. Experiments show that the data reading system can complete data remote transmission quickly and accurately without frame error or frame losing and has engineering practical value.关键词
数据传输/FPGA/LVDS/USBKey words
data transmission/FPGA/LVDS/USB分类
信息技术与安全科学引用本文复制引用
赵阳刚,郭涛,黄玉岗..基于FPGA和LVDS的弹载数据回读系统设计∗[J].电子器件,2017,40(1):113-117,5.基金项目
国家自然科学基金项目(50930009,51075394) （50930009,51075394）
