电测与仪表2017，Vol.54Issue(3)：54-59,88,7.
基于FPGA的CRC查表法设计及优化
Design and optimization of CRC look-up table method based on the FPGA
夏忠海 1任勇峰 1贾兴中 2郭佳欣1
作者信息
- 1. 畅中北大学电子测试技术国家重点实验室,太原030051
- 2. 畅中北大学仪器科学与动态测试教育部重点实验室,太原030051
- 折叠
摘要
Abstract
Cyclic redundancy check (CRC) has the strong ability of error detection, small overhead, easy to use the encoder and the realization of detection circuit, which is much better than the parity and arithmetic and calibration method, as a result, the characteristics of the CRC check is added in the serial communication which can ensure the effectiveness of communication.And the FPGA is featured with flexible and stable, rapid and efficient characteristics, so the design with VHDL realization of CRC look-up table method and the optimization analysis make it have good sta-bility in serial communication, and the accuracy of the data transmission is improved.关键词
CRC校验/串行通信/FPGA/查表法/VHDLKey words
CRC check/serial communication/FPGA/look-up table method/VHDL分类
信息技术与安全科学引用本文复制引用
夏忠海,任勇峰,贾兴中,郭佳欣..基于FPGA的CRC查表法设计及优化[J].电测与仪表,2017,54(3):54-59,88,7.
