单片机与嵌入式系统应用2017，Vol.17Issue(3)：47-50,4.
FPGA与ARM的GPMC总线通信接口设计
GPMC Bus Interface Based on FPGA&ARM
刁彦华 1贾宝青 1王晓君1
作者信息
- 1. 河北科技大学信息科学与工程学院 ,石家庄050000
- 折叠
摘要
Abstract
To meet the rapid and stable transmission of the data ,simplify the hardware design and increase the flexibility ,a scheme of u-sing GPMC's own ARM bus as the data transmission interface between ARM and FPGA is proposed .The principle of GPMC interface and the implementation of GPMC interface timing in FPGA are introduced in detail .Firstly ,the internal FPGA achieves the reading and writing timing of the GPMC interface in ARM processor ,then the design completes the communication between ARM and FPGA .Sec-ondly ,the FPGA finishes collecting and saving for the high-speed signal .When the stored data to a certain amount ,the FPGA interrupts the ARM processor for data read .The simulation results show thatthe new interface can complete the high-speed signal transmission sta-bility comparing with the previous interface .关键词
接口/GPMC/ARM/FPGA/嵌入式系统Key words
interface/GPMC/ARM/FPGA/embedded system分类
信息技术与安全科学引用本文复制引用
刁彦华,贾宝青,王晓君..FPGA与ARM的GPMC总线通信接口设计[J].单片机与嵌入式系统应用,2017,17(3):47-50,4.
