计算机工程与科学2017，Vol.39Issue(2)：252-257,6.DOI:10.3969/j.issn.1007-130X.2017.02.005
基于ECC校验码的存储器可扩展自修复算法设计
A scalable memory-built-in-self-repair algorithm based on ECC check code
任秀江 1谢向辉 2施晶晶1
作者信息
- 1. 江南计算技术研究所,江苏无锡214083
- 2. 数学工程与先进计算国家重点实验室,江苏无锡214125
- 折叠
摘要
Abstract
With the continuous progress of microelectronic technology,the static random access memory (SRAM) occupies the majority area of modern systems-on-a-chip (SoC),so the defect rate of the SRAM has become an important factor affecting the yield of chips.We propose a scalable memorybuilt-in-self-repair algorithm(S-MBISR)based on error checking and correcting (ECC) check code.With the same redundant SRAM structure,the correcting capability of the ECC code can enhance the fault tolerant capability,thus increasing the rate of finished product of chips effectively without increasing test time.We implement the algorithm on the RTL,and the evaluation of the back-end design shows that its working frequency can reach 1GHz while the area overhead is only 1.5％.关键词
MBSIR/MBIST/ECCKey words
MBSIR/MBIST/ECC分类
信息技术与安全科学引用本文复制引用
任秀江,谢向辉,施晶晶..基于ECC校验码的存储器可扩展自修复算法设计[J].计算机工程与科学,2017,39(2):252-257,6.
