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用于视频图像传感器的12 bit 60 MS/s流水线模数转换器

邓准 谢亮 金湘亮

太赫兹科学与电子信息学报2016,Vol.14Issue(6):948-952,5.
太赫兹科学与电子信息学报2016,Vol.14Issue(6):948-952,5.DOI:10.11805/TKYDA201606.0948

用于视频图像传感器的12 bit 60 MS/s流水线模数转换器

A 12 bit 60 MS/s pipeline ADC for video image sensor

邓准 1谢亮 2金湘亮1

作者信息

  • 1. 湘潭大学物理与光电工程学院,湖南湘潭 411105
  • 2. 湘潭大学微光电与系统集成湖南省工程实验室,湖南湘潭 411105
  • 折叠

摘要

Abstract

A 12 bit 60 MS/s pipeline Analog-to-Digital Conversion(ADC) is introduced. Using the sample and hold circuit,the continuous variation of the analog signal is sampled by a certain time interval,in order to achieve accurate signal. Gain bootstrap amplifier is adopted to improve the establishment of signal linearity. The pipeline structure of 1.5 bit per stage is utilized to achieve redundancy encoding,and reduce the offset voltage of the comparator. A new pre-amplifier comparator structure which can eliminate the static power is put forward. The design of schematic and layout is based on Huali Microelectronics Corp(HMC) 55nm Complementary Metal Oxide Semiconductor(CMOS) technology. Fast Fourier Transform(FFT) analysis results on post simulation give the Dynamic parameters: Spurious Free Dynamic Range(SFDR) of 86.18 dB,Signal-to-Noise Ratio(SNR) of 72.91 dB,Signal-to-Noise-and-Distortion Ratio(SNDR) of 72.8 dB,Effective Number of Bits(ENOB) of 11.72 bit.

关键词

流水线模数转换器/增益自举运放/预放大比较器

Key words

pipelinedAnalog-to-Digital Conversion/gain bootstrap amplifier/pre-amplifier comparator

分类

信息技术与安全科学

引用本文复制引用

邓准,谢亮,金湘亮..用于视频图像传感器的12 bit 60 MS/s流水线模数转换器[J].太赫兹科学与电子信息学报,2016,14(6):948-952,5.

基金项目

国家自然科学基金资助项目(61274043 ()

1233010) ()

湖南省自然科学杰出青年基金资助项目(2015JJ1014) (2015JJ1014)

太赫兹科学与电子信息学报

OACSTPCD

2095-4980

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