计算机与数字工程2017，Vol.45Issue(3)：531-534,4.DOI:10.3969/j.issn.1672-9722.2017.03.026
基于FPGA的RAW图像饱和校正的实现
Implementation of Estimating Saturated Pixel Values Based on FPGA
李慧林 1武云钢2
作者信息
- 1. 西安工程大学电子信息学院 西安 710048
- 2. 西安交通大学电子信息工程学院 西安 710048
- 折叠
摘要
Abstract
Pixel saturation is very common in digital color imaging, which will result in the artifact of color splash.In order to improve image quality, this paper presents a hardware implementation in a FPGA circuit of an algorithm to estimate saturated pixels in RAW image.For the 1-channel saturation, the Bayesian estimation is realized using simple digital circuits and memory.For the 2-channel and 3-channel saturation, a ring structure is designed to handle the saturated color channels in the order obtained previously.Whatever the order of the color channels is, the image data can be processed properly by the ring structure.The design has been specified in VHDL targeted on an Altera Cyclone EP4CGX150DF31C8 based FPGA and verified for functional correctness by software simulation, and the fmax can reach 100MHz.Co-simulation shows that the proposed method in hardware implementation has estimated the saturated pixels fast.The hardware algorithm can be embedded inside the camera to realize correcting saturated pixels in real time.关键词
图像饱和校正/FPGA/彩色图像处理/RAW图像Key words
estimate saturated pixels/FPGA/color image processing/RAW image分类
通用工业技术引用本文复制引用
李慧林,武云钢..基于FPGA的RAW图像饱和校正的实现[J].计算机与数字工程,2017,45(3):531-534,4.
