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一种支持Superscalar-VLIW混合架构处理器的混合分支预测设计

付家为 王旭 何虎

计算机应用与软件2017,Vol.34Issue(2):106-111,6.
计算机应用与软件2017,Vol.34Issue(2):106-111,6.DOI:10.3969/j.issn.1000-386x.2017.02.018

一种支持Superscalar-VLIW混合架构处理器的混合分支预测设计

A DESIGN OF HYBRID BRANCH PREDICTOR SUPPORTING SUPERSCALAR-VLIW HYBRID MICROPROCESSOR

付家为 1王旭 1何虎1

作者信息

  • 1. 清华大学微电子学研究所 北京100084
  • 折叠

摘要

Abstract

A design of hybrid branch predictor on a digital signal processor which supports Superscalar-VLIW hybrid architecture is described.To control hardware complexity and improve the accuracy of prediction,a hybrid branch predictor of bimodal and PAp is selected for the branch prediction scheme.The standard DSPstone programs have been run on the processor.The experimental results show that the processor with hybrid branch predictor has an improvement of 23% on average compared with processor without branch predictor,and processor with hybrid branch predictor predicts more accurately than processor with only bimodal predictor.

关键词

数字信号处理器/超标量/超长指令字/分支预测/双峰预测/PAp

Key words

Digital signal processor/Superscalar/VLIW/Branch prediction/Bimodal prediction/PAp

分类

信息技术与安全科学

引用本文复制引用

付家为,王旭,何虎..一种支持Superscalar-VLIW混合架构处理器的混合分支预测设计[J].计算机应用与软件,2017,34(2):106-111,6.

基金项目

核高基重大专项基金项目(2012ZX01034001-002). (2012ZX01034001-002)

计算机应用与软件

OA北大核心CSTPCD

1000-386X

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