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Avalon总线的音频编解码控制器IP核设计

秦玉龙

单片机与嵌入式系统应用2017,Vol.17Issue(6):60-62,79,4.
单片机与嵌入式系统应用2017,Vol.17Issue(6):60-62,79,4.

Avalon总线的音频编解码控制器IP核设计

Audio Codec Controller IP Core Design Based on Avalon Bus

秦玉龙1

作者信息

  • 1. 宿迁学院信息工程学院,宿迁223800
  • 折叠

摘要

Abstract

In the paper, the design of WM8731 audio codec controller IP core based on the Avalon bus is designed,including the codec data access interface module and the Avalon-MM interface module, which is encapsulated into reusable IP cores using SoPC technology.The use of custom IP core can effectively reduce the difficulty of the development of the chip,and makes the system easy to expand and upgrade,and it has the advantages of high flexibility.The design and simulation of the controller and the construction of Nios Ⅱ system are completed in Quartus Ⅱ and ModelSim using VHDL,and the hardware verification is performed using SignalTap Ⅱ logic analyzer.The simulation and test results show that the controller can meet the timing requirements of WM8731.

关键词

音频编解码/自定义IP核/Avalon总线/Nios Ⅱ

Key words

audio codec/custom IP Core/Avalon bus/Nios Ⅱ

分类

信息技术与安全科学

引用本文复制引用

秦玉龙..Avalon总线的音频编解码控制器IP核设计[J].单片机与嵌入式系统应用,2017,17(6):60-62,79,4.

单片机与嵌入式系统应用

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