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基于Zynq平台PCIE高速数据接口的设计与实现

杨亚涛 张松涛 李子臣 张明舵 曹广灿

电子科技大学学报2017,Vol.46Issue(3):522-528,7.
电子科技大学学报2017,Vol.46Issue(3):522-528,7.DOI:10.3969/j.issn.1001-0548.2017.03.008

基于Zynq平台PCIE高速数据接口的设计与实现

Design and Implementation for High Speed Data Transfer Interface of PCI Express Based on Zynq Platform

杨亚涛 1张松涛 1李子臣 1张明舵 2曹广灿1

作者信息

  • 1. 北京电子科技学院通信工程系 北京丰台区 100070
  • 2. 北京印刷学院教务处 北京大兴区102600
  • 折叠

摘要

Abstract

In order to use the excellent transmission performance of peripheral component interconnect express (PCIE) interface to carry out high-speed communication between peripherals and the host effectively,a multi-channel and high-speed PCIE interface scheme is designed based on Zynq family chip of Xilinx.The DMA hardcore controller,device driver and application program are designed on the basis of PCI express 2.0 hardcore using the FPGA+ARM architecture of Zynq-7000 platform.Test results show that the transfer rate in our project almost can reach 3.3 Gbps in PCIE× 1 lane and single logical channel,which increases about 20% compared with the traditional existing designs.Our scheme owns higher expansibility and wide application prospect,it is an important design reference for external equipment and PCIE interface.

关键词

ARM/DMA/FPGA/硬件设计/PCIE

Key words

ARM/DMA/FPGA/hardware design/PCI express

分类

信息技术与安全科学

引用本文复制引用

杨亚涛,张松涛,李子臣,张明舵,曹广灿..基于Zynq平台PCIE高速数据接口的设计与实现[J].电子科技大学学报,2017,46(3):522-528,7.

基金项目

国家自然科学基金(61370188) (61370188)

中央高校基本科研业务费专项资金(2017XK01) (2017XK01)

电子科技大学学报

OA北大核心CSCDCSTPCD

1001-0548

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