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基于通用可重构处理器的AES算法设计与实现

陈宇涵 杜学绘 包义保

计算机工程2017,Vol.43Issue(5):134-142,9.
计算机工程2017,Vol.43Issue(5):134-142,9.DOI:10.3969/j.issn.1000-3428.2017.05.022

基于通用可重构处理器的AES算法设计与实现

Design and Implementation of AES Algorithm Based on General Reconfigurable Processor

陈宇涵 1杜学绘 2包义保1

作者信息

  • 1. 解放军信息工程大学四院,郑州450001
  • 2. 数学工程与先进计算国家重点实验室,郑州450001
  • 折叠

摘要

Abstract

Based on the architecture of General Reconfigurable Processor(GReP),this paper proposes an Advanced Encryption Standard(AES)-128 implementation scheme,which is optimized in algorithm structure,Processing Element (PE) utilization ratio and storage cost.This scheme uses a 256 bit x 32 bit look-up table to complete the byte instead of mixing with the column on encryption time,improves PE utilization ratio through data decomposition and data stream decomposition,and reduces storage overhead through local register and reasonable layout of PE.Experimental result indicates that,PE utilization ratio reaches 60% and memory access cost reduces 74% than totally using shared memory.Compared with the serial method on Intel Atom230,this scheme increases throughput rate by about 100%.

关键词

高级加密标准算法/可重构计算/通用可重构处理器/查找表/数据分解/数据流分解

Key words

Advanced Encryption Standard (AES) algorithm/reconfigurable computing/general reconfigurable processor/look-up table/data decomposition/data stream decomposition

分类

信息技术与安全科学

引用本文复制引用

陈宇涵,杜学绘,包义保..基于通用可重构处理器的AES算法设计与实现[J].计算机工程,2017,43(5):134-142,9.

基金项目

国家“863”计划项目(2012AA012704,2015AA011705). (2012AA012704,2015AA011705)

计算机工程

OA北大核心CSCDCSTPCD

1000-3428

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