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基于FPGA的加密算法验证平台设计

姚霁

电子科技2017,Vol.30Issue(6):21-23,3.
电子科技2017,Vol.30Issue(6):21-23,3.DOI:10.16180/j.cnki.issn1007-7820.2017.06.006

基于FPGA的加密算法验证平台设计

Design of Validation Platform of Encryption Algorithm Based on FPGA

姚霁1

作者信息

  • 1. 西安邮电大学 自动化学院,陕西 西安 710121
  • 折叠

摘要

Abstract

A validation platform based on FPGA is put forward for shorter implementation cycle of encryption algorithm chip.The encryption algorithm is implemented in FPGA.The cipher texts can be observed with digital display circuits.The implementation example of DES Encryption algorithm is given.The system architecture, control principle of this validation platform and the implementation of DES algorithm are descripted.It is shown that the implementation cycle of encryption algorithm is shortened on this FPGA validation platform.The reliability, practicability and feasibility for encryption algorithm implementation are also guaranteed on this platform.

关键词

加密算法/FPGA/验证平台

Key words

encryption algorithm/FPGA/verification platform

分类

信息技术与安全科学

引用本文复制引用

姚霁..基于FPGA的加密算法验证平台设计[J].电子科技,2017,30(6):21-23,3.

电子科技

1007-7820

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