电子学报2017，Vol.45Issue(7)：1584-1592,9.DOI:10.3969/j.issn.0372-2112.2017.07.006
LTE-Advanced标准中一种基于反向重算的低存储容量Turbo码译码器结构设计
A Memory Reduced Turbo Code Decoding Architecture for LTE-Advanced Standard Based on Reverse Recalculation
摘要
Abstract
In the LTE-Advanced standards,to satisfy the low-power dissipation requirement in mobile scenarios,a decoder with small memory size has attracted extensive attention.By decomposing the trellis diagram of the adopted turbo code,this paper proposes a memory reduced decoding architecture based on reverse recalculation.A modified Jacobian logarithm is specially investigated for the reverse recalculation,and the reverse recalculation in logarithmic domain and the realization structure are also presented.It shows that at the price of low redundant calculation complexity,the memory size is reduced by 50%,while the decoding performance is very close to that of the Log-MAP algorithm.The proposed decoding scheme is superior to other decoding architectures in terms of dummy computation complexity,memory size and decoding performance.关键词
LTE-Advanced标准/Turbo码/MAP算法/低存储容量译码器结构Key words
LTE-advanced standard/Turbo code/MAP algorithm/memory reduced decoding architecture分类
信息技术与安全科学引用本文复制引用
詹明,文红,伍军..LTE-Advanced标准中一种基于反向重算的低存储容量Turbo码译码器结构设计[J].电子学报,2017,45(7):1584-1592,9.基金项目
国家自然科学基金(No.61572114,No.61671390,No.61401273) （No.61572114,No.61671390,No.61401273）
国家博士后科学基金(No.2015M570776) （No.2015M570776）
西南大学基本科研专项资金重点项目(No.XDJK2016B002) （No.XDJK2016B002）
