液晶与显示2017，Vol.32Issue(8)：607-613,7.DOI:10.3788/YJYXS20173208.0607
以太网数传系统在FPGA上的实现
Realization of Ethernet data transmission system on FPGA
贲广利 1王永成 1徐东东 1郑佳宁 1吴铮2
作者信息
- 1. 中国科学院 长春光学精密机械与物理研究所,吉林 长春 130033
- 2. 电子科技大学 通信与信息工程学院,四川 成都 611731
- 折叠
摘要
Abstract
In digital signal processing or control circuit based on FPGA, in order to export original sampling data or intermediate processing result data for analyzing and processing later, from the view of stabile transmission, easy realization and low cost, a 100 Mbps Embedded Ethernet data transmission system based on FPGA TSE IP core is designed. First, the paper introduces the hardware design thought in SOPC with the main processor NiosII CPU, mainly including the Ethernet MAC designing based on TSE IP core. Uninterrupted data transmission during all transmit time is guaranteed by Pingpang RAM mechanism and a method of controlling data start and stop transmitting is also designed. Then, using MicroC/OS-II real-time operating system of multi task mode, and based on Niche stack TCP/IP protocol, the software design of the system is realized. Also, the software program flow chart which details the software work flow of the system is given. Finally, by transferring designated data, a verification method of rate and stability during data transmission is provided. The test result shows that the system is stable and reliable in data transmission when the rate is up to 51 Mbps.关键词
嵌入式以太网/数据传输/FPGAKey words
embedded Ethernet/data transmission/FPGA分类
信息技术与安全科学引用本文复制引用
贲广利,王永成,徐东东,郑佳宁,吴铮..以太网数传系统在FPGA上的实现[J].液晶与显示,2017,32(8):607-613,7.
