燕山大学学报2017，Vol.41Issue(5)：444-449,6.DOI:10.3969/j.issn.1007-791X.2017.05.010
高隔离度GPS干扰器设计与实现
Design and realization for high-isolation GPS jammer
摘要
Abstract
The research on Global Positioning System ( GPS) jamming and anti-jamming is of great significance for satellite commu-nication.A design and realization for high-isolation GPS jammer is put forward aimed at jamming original GPS signals. The generation of base code is based on Field-Programmable Gate Array( FPGA) hardware platform Virtex-5.Direct Digital Frequency Synthesis ( DDS) was completed under the control of an AD9956 chip drived by an STM8S105 microcontroller.With the help of di-viders, multipliers and unbalanced quadrature phase shift keying modulators, GPS jammer signals of L1 and L2 frequencies were derived.The L1 frequency and L2 frequency signals had characteristic of high-isolation and good performance on anti-noise.The pro-ject was testified by Integrated Software Environment simulation and advanced spectrum analyzer.关键词
GPS干扰器/现场可编程门阵列/高隔离度/L1频段/L2频段Key words
GPS jammer/FPGA/high-isolation/L1 frequency/L2 frequency分类
自科综合引用本文复制引用
魏涛,郑建生..高隔离度GPS干扰器设计与实现[J].燕山大学学报,2017,41(5):444-449,6.基金项目
国家自然科学基金资助项目(61273053) （61273053）
