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DDR3与FPGA接口的高速电路板信号完整性分析

金帅 韩连刚 谢锡海

现代电子技术2017,Vol.40Issue(22):10-13,4.
现代电子技术2017,Vol.40Issue(22):10-13,4.DOI:10.16652/j.issn.1004-373x.2017.22.003

DDR3与FPGA接口的高速电路板信号完整性分析

Signal integrity analysis of high-speed circuit board interconnecting DDR3 and FPGA

金帅 1韩连刚 2谢锡海1

作者信息

  • 1. 西安邮电大学 通信与信息工程学院,陕西 西安710061
  • 2. 中国航天四院,陕西 西安710121
  • 折叠

摘要

Abstract

As the chip frequency increases,the signal integrity analysis in today′s high-speed PCB design has become the key link that cannot be ignored. Taking the high-speed PCB as the hardware platform,in which FPGA controls the reading and writing data of DDR3 SDRAM,the signal integrity problems of reflection and crosstalk in high-speed PCB design are elaborated. With the SPECCTRAQuest simulator made by Cadence Company as the simulation tool,the method of suppressing the reflection and crosstalk is put forward and verified. The simulation results show that the terminating resistor can suppress reflection,and the suppression effect varies with different termination modes and different frequencies of the drive end;changing the wire rout-ing interval and wiring length can suppress crosstalk. The simulation experiments before and after wire routing were performed to guide the PCB design,so as to ensure the normal running of the hardware platform.

关键词

高速PCB/信号完整性/FPGA/反射/串扰

Key words

high-speed PCB/signal integrity/FPGA/reflection/crosstalk

分类

信息技术与安全科学

引用本文复制引用

金帅,韩连刚,谢锡海..DDR3与FPGA接口的高速电路板信号完整性分析[J].现代电子技术,2017,40(22):10-13,4.

基金项目

国家科技攻关计划(2014K05-20) (2014K05-20)

现代电子技术

OA北大核心CSTPCD

1004-373X

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