现代电子技术2017，Vol.40Issue(24)：21-24,27,5.DOI:10.16652/j.issn.1004-373x.2017.24.007
基于Kintex-7 FPGA的DDR3 SDRAM接口应用研究
Application of DDR3 SDRAM interface based on Kintex-7 FPGA
摘要
Abstract
Aiming at the application background of using DDR3 for large-capacity data caching in FPGA,a design scheme of DDR3 SDRAM FIFO interface based on Xilinx Kintex-7 FPGA is presented according to the modularized design method. Based on the analysis of DDR3 user interface characteristics and user interface time sequence,the efficiency of different read-write modes was tested. In combination with the design thought of standard FIFO and characteristics of DDR3 SDRAM control-ler,the traversal state machine is designed to perform the read-write test of the FIFO interface. The interface was verified with the prototype platform. The result demonstrates that the interface has the simple and easy-to-use functions of standard FIFO,and large storage space.关键词
DDR3SDRAM/FIFO/FPGA/遍历状态机Key words
DDR3 SDRAM/first-in first-out/field programmable gate array/traversal state machine分类
信息技术与安全科学引用本文复制引用
吴长瑞,徐建清,蒋景红..基于Kintex-7 FPGA的DDR3 SDRAM接口应用研究[J].现代电子技术,2017,40(24):21-24,27,5.基金项目
国家自然科学基金项目(11304343) （11304343）
