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Fabrication and modeling of multi-layer metal-insulator-metal capacitors

R Karthik A Akshaykranth

半导体学报（英文版）2017，Vol.38Issue(12)：32-36,5.
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半导体学报（英文版）2017，Vol.38Issue(12)：32-36,5.DOI:10.1088/1674-4926/38/12/123002

Fabrication and modeling of multi-layer metal-insulator-metal capacitors

Fabrication and modeling of multi-layer metal-insulator-metal capacitors

R Karthik 1A Akshaykranth1

作者信息

  • 1. MLR Institute of Technology, Dundigal, Hyderabad 500043, India
  • 折叠

摘要

关键词

anodic oxidation/dielectric/high-k/multi-layer/capacitance-voltage/Maxwell-Wagner/capacitor

Key words

anodic oxidation/dielectric/high-k/multi-layer/capacitance-voltage/Maxwell-Wagner/capacitor

引用本文复制引用

R Karthik,A Akshaykranth..Fabrication and modeling of multi-layer metal-insulator-metal capacitors[J].半导体学报（英文版）,2017,38(12):32-36,5.

基金项目

Project supported by the Science and Engineering Research Board (No.ECR/2016/001156). （No.ECR/2016/001156）

半导体学报（英文版）

OACSCDCSTPCD

1674-4926

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