电测与仪表2017，Vol.54Issue(22)：59-64,6.
基于Nand Flash的BCH校验方法设计与实现
Design and imple mentat ion of BCH verification method based on Nand Flash
摘要
Abstract
According to the internal structure of the Nand Flash memory and poor correct capability of traditional ECC of Hamming checking method,a kind of(4200,4096,8)BCH code for ECC verification is proposed.Parallel coding mode is chosen in this method, what's more,parallel pipeline block decoding method is used for the decoder,which occupies most logical resource.With the method above,decoding efficiency is greatly increased.FPGA is selected as the verification platform,verification on this platform shows that the storage reliability is significantly improved through using BCH code for ECC verification.The proposed method has high practical value and provides reference for current large capacity storage.关键词
BCH校验/并行编码/分块译码/FPGA/可靠性Key words
BCH checking/parallel coding/block decoding/FPGA/reliability分类
信息技术与安全科学引用本文复制引用
焦新泉,武慧军,单彦虎,秦菲..基于Nand Flash的BCH校验方法设计与实现[J].电测与仪表,2017,54(22):59-64,6.基金项目
国家自然科学基金资助项目(51475437) （51475437）
