计算机工程与科学2018，Vol.40Issue(1)：1-9,9.DOI:10.3969/j.issn.1007-130X.2018.01.001
基于模型和库的处理器伪随机激励生成器设计与实现
Design and implementation of processor pseudo-random test generator based on models and libraries
摘要
Abstract
Processor pseudo-random test generators are important and necessary in processor research and development,which can generate large numbers of tests so as to cover the huge verification space.However,some of tests in the test set may become illegal and useless when the processor design changes,especially when instruction set or architecture changes,resulting in significant verification and maintenance costs.In order to tackle the problem,a hierarchical method based on models and libraries is proposed to create a processor pseudo-random test generator.Several techniques such as instruction set tree modeling,multidimensional memory address modeling and processor professional knowledge library modeling are used to solve the problem of how to efficiently reuse test sets in processor research and development.The practical application shows that this method can well adapt to the changes of processor design and enhance the usability and reusability of processor pseudo-random test generators.The reuse rate of test set can reach more than 95 ％,which can significantly shorten the verification cycle when the processor design is changed and upgraded.关键词
模拟验证/处理器功能验证/伪随机测试/激励生成器Key words
simulation/processor functional verification/pseudo-random test/test generator分类
信息技术与安全科学引用本文复制引用
巨鹏锦,张晓冬,李辉..基于模型和库的处理器伪随机激励生成器设计与实现[J].计算机工程与科学,2018,40(1):1-9,9.基金项目
核高基“超级计算机处理器研发”课题(2013ZX01028-001-001-001) （2013ZX01028-001-001-001）
