计算机与数字工程2018，Vol.46Issue(2)：402-406,5.DOI:10.3969/j.issn.1672-9722.2018.02.038
极化码SCL译码器设计
Design of Polar Code SCL Decoder
丁冉 1仰枫帆1
作者信息
- 1. 南京航空航天大学电子信息工程学院 南京210016
- 折叠
摘要
Abstract
Recently,Polar codes are seen as a breakthrough in channel coding.It has been proved that they can achieve the Shannon Limit under discrete memoryless channels. Moreover,their encoding and decoding algorithm have low complexity. The SCL decoding algorithm is an improved version of SC algorithm,which bridges the gap between the SC and the ML decoding of polar codes. Based on this algorithm,a SCL polar decoder with code length N=1024 and the list width L=32 is proposed,5SGX-EA7N2F45C1 chip of Altera Stratix V series are chosen to implement. The final results show that the decoder can achieve the throughput of about 6.5Mpbs under operating frequency of 300MHz.关键词
极化码/SCL译码算法/译码器/FPGA实现Key words
POlar codes/SCL decoding algorithm/decoder/FPGA implementation分类
信息技术与安全科学引用本文复制引用
丁冉,仰枫帆..极化码SCL译码器设计[J].计算机与数字工程,2018,46(2):402-406,5.
