电讯技术2018，Vol.58Issue(2)：204-209,6.DOI:10.3969/j.issn.1001-893x.2018.02.015
一种频率合成器的建模优化与电路设计
Model Optimization and Circuit Design of a Frequency Synthesizer
摘要
Abstract
According to the demand of fast verification of system level and behavioral level about digital-analog mix integrated circuits,a frequency synthesizer for the front end of the RF receiver used in Global Navigation Satellite System(GNSS) is designed. The traditional behavior level model is usually based on the ideal loop for parameter extraction with large error.To solve this problem,firstly,MATLAB and Verilog-AMS are used to establish ideal behavior model and non-ideal behavior model for frequency synthesizer respectively. According to the loop parameters extracted and optimized from the behavioral model,the cir-cuit-level frequency synthesizer is designed and simulated based on SMIC 180 nm CMOS process. Second-ly,the MATLAB noise model is established,and the noise of each circuit level module is fitted to evaluate the overall noise performance of the frequency synthesizer. The frequency synthesizer design method pro-posed has forward-looking guidance for circuit-level design and contributes to circuit-level design optimi-zation.关键词
全球卫星导航系统/射频接收机前端/频率合成器设计/行为级模型/非理想效应Key words
global navigation satellite system(GNSS)/RF receiver front end/frequency synthesizer design/Behavioral level model/non-ideal effect分类
信息技术与安全科学引用本文复制引用
徐卫林,朱潮勇,李海鸥,于越..一种频率合成器的建模优化与电路设计[J].电讯技术,2018,58(2):204-209,6.基金项目
国家自然科学基金资助项目(61264001) （61264001）
广西精密导航技术与应用重点实验室基金(DH201504) （DH201504）
桂林电子科技大学研究生创新项目(2016YJCX86) （2016YJCX86）
