现代电子技术2018，Vol.41Issue(10)：10-14,5.DOI:10.16652/j.issn.1004⁃373x.2018.10.003
高性能多标准可配置Viterbi译码器设计与验证
Design and verification of high-performance multi-standard configurable Viterbi decoder
摘要
Abstract
To make the Viterbi decoder widely applied in more standards,a high-performance configurable Viterbi decoder is proposed by combining with pre-traceback(PTB)decoding and sliding-window pipeline technology,and reducing the XOR delay by means of the specification subtraction operation in Add-Compare-Select(ACS)components. The decoder can support the code rates of 1/2,1/3 and 1/4,constraint length of 5 to 9,polynomial generation arbitrary configuration and other parame-ters,and meanwhile can support multiple standards such as GPRS,WiMAX,IS-95 CDMA,LTE,and CDMA2000. On the ba-sis of the decoder design,a module-level verification platform is established based on the UVM verification methodology to ac-complish module-level functional verification for the Viterbi decoder with the code coverage rate as high as 99.4%. The Synopsys Design Compiler tool is used to perform integration,and the area is 0.2 mm2. In the 28 nm process with the main frequency of 500 MHz,the power consumption is 38.3 mW and the throughput rate is 1.06 Gbit/s. The results show that the decoder has good flexibility and compatibility,and has a good prospect in mobile terminal application.关键词
Viterbi译码器/滑窗流水技术/多项式任意配置/UVM验证方法学/异或延迟/移动终端Key words
Viterbi decoder/sliding-window pipeline technology/polynomial arbitrary configuration/UVM verification methodology/XOR delay/mobile terminal分类
信息技术与安全科学引用本文复制引用
戴澜,马东俊..高性能多标准可配置Viterbi译码器设计与验证[J].现代电子技术,2018,41(10):10-14,5.基金项目
国家自然科学基金资助项目(61674087) （61674087）
国家自然科学基金资助项目(61674092)Project Supported by National Natural Science Foundation of China(61674087),National Natural Science Foundation of China(61674092) （61674092）
