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面向电子控制器的片上可调试性结构设计

陈芳芳 周克宁

电子器件2018,Vol.41Issue(3):708-712,5.
电子器件2018,Vol.41Issue(3):708-712,5.DOI:10.3969/j.issn.1005-9490.2018.03.031

面向电子控制器的片上可调试性结构设计

On-Chip Debug Structure Design for Electronic Controller

陈芳芳 1周克宁2

作者信息

  • 1. 江苏联合职业技术学院南京分院电气工程系,南京210019
  • 2. 南京林业大学机电工程学院,南京210037
  • 折叠

摘要

Abstract

An on-chip debug structure is presented for electronic controller with the requirement of high reliability. The design could eliminate the overhead of cost and size incurred by redundant pins with reusing JTAG interface;while self-defined instructions based on TAP controller can merge structural test with functional debug through JTAG link. Aiming at the requirement for transforming debug command with bus accesses, a low-cost and high efficiency serial-to-parallel converter could debug the whole address space. Test results show that the approach shortens the debugging time by 79.8% on average, and reduces the area overhead by 16.73%, while obviously improves the reliability of debug link.

关键词

电子控制器/串并转换/仿真/JTAG/TAP

Key words

electronic controller/serial-to-parallel converter/simulation/JTAG/TAP

分类

信息技术与安全科学

引用本文复制引用

陈芳芳,周克宁..面向电子控制器的片上可调试性结构设计[J].电子器件,2018,41(3):708-712,5.

基金项目

江苏省科技厅重点项目( 2015A02368) ( 2015A02368)

电子器件

OA北大核心CSTPCD

1005-9490

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