电子器件2018，Vol.41Issue(3)：808-812,5.DOI:10.3969/j.issn.1005-9490.2018.03.051
应用于可穿戴式设备的超低功耗SAR ADC研究与设计
Research and Design of Ultra-Low Power Successive Approximation Register Analog-to-Digital Converter for Wearable Equipment Applications
摘要
Abstract
A successive approximation register(SAR)analog-to-digital converter(ADC)is presented to meet the require-ments of ultra-low power for portable mobile wearable equipment. Capacitors splitting circuit in the DAC capacitor array was designed in the proposed SAR ADC to reduce power consumption and chip area. Double-Tail currentsdy-namic comparator architecture was adopted to further reduce its power consumption. The proposed SAR ADC was fabricated with 0. 18 μm Complementary Metal Oxide Semiconductor technology. Measured results show that this ADC consumes 1.5μW with the FOM of 55.3 fJ conversion-step at 50 kS/s sample under 1.8 V power supply and it achieves ENOB of 9.083 bits. It can meet the requirements of wearable equipment applications.关键词
集成电路/超低功耗/电容拆分/逐次逼近型/模数转换器/可穿戴式Key words
integrated circuit/Ultra low power/capacitors splitting/successive approximation register/analog-to-dig-ital converter/wearable equipment分类
信息技术与安全科学引用本文复制引用
向指航,徐卫林,段吉海,周茜,韦保林..应用于可穿戴式设备的超低功耗SAR ADC研究与设计[J].电子器件,2018,41(3):808-812,5.基金项目
国家自然科学基金项目( 61264001) （ 61264001）
广西自然科学基金项目( 2015GXNSFAA139301,2014GXNSFAA118386) （ 2015GXNSFAA139301,2014GXNSFAA118386）
广西精密导航技术与应用重点实验室基金项目( DH201504). （ DH201504）
