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65nm CMOS可集成ps级窄脉冲驱动器

许超龙 赖明澈 罗章 向阳 庞征斌

计算机工程与科学2018,Vol.40Issue(3):405-410,6.
计算机工程与科学2018,Vol.40Issue(3):405-410,6.DOI:10.3969/j.issn.1007-130X.2018.03.004

65nm CMOS可集成ps级窄脉冲驱动器

A 65 nm CMOS compositiveps level narrow pulse driver

许超龙 1赖明澈 1罗章 1向阳 1庞征斌1

作者信息

  • 1. 国防科技大学计算机学院,湖南长沙410073
  • 折叠

摘要

Abstract

Depending on the breakthrough of single-chip opto-electrical integration and the advance of the optical pulse train generator technology,a new optical interconnect technology-optical serializer/deserialier (SerDes) technology is proposed.Compared with traditional optical interconnect technology,optical SerDes technology is faster,lower power consumption and higher integration.The performance and integration requirement of driver circuit that drives the optical switch producing narrow optical pulse in a relative long cycle is more stringent.A 65nm CMOS integrated ps level narrow pulse driver used for optical SerDestransceiver is proposed.The driver drives optical switch producing optical pulse,which is as narrow as 13ps in SMIC 65nm CMOS library.The power voltage range is in 1.4~2.0 V,and the clock frequency is from several KHz up to 25 GHz.

关键词

ps/65 nm CMOS/驱动器/光开关/光SerDes

Key words

ps/65 nm CMOS/driver/optical switch/optical SerDes

分类

信息技术与安全科学

引用本文复制引用

许超龙,赖明澈,罗章,向阳,庞征斌..65nm CMOS可集成ps级窄脉冲驱动器[J].计算机工程与科学,2018,40(3):405-410,6.

基金项目

国家863计划(2015AA015302) (2015AA015302)

计算机工程与科学

OA北大核心CSCDCSTPCD

1007-130X

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