东南大学学报（英文版）2018，Vol.34Issue(2)：166-172,7.DOI:10.3969/j.issn.1003-7985.2018.02.004
三维集成电路绑定中测试成本缩减的优化堆叠顺序
An optimal stacking order for mid-bond testing cost reduction of 3D IC
摘要
Abstract
In order to solve the problem that the testing cost of the three-dimensional integrated circuit ( 3D IC) is too high, an optimal stacking order scheme is proposed to reduce the mid-bond test cost. A new testing model is built with the general consideration of both the test time for automatic test equipment ( ATE ) and manufacturing failure factors. An algorithm for testing cost and testing order optimization is proposed, and the minimum testing cost and optimized stacking order can be carried out by taking testing bandwidth and testing power as constraints. To prove the influence of the optimal stacking order on testing costs, two baselines stacked in sequential either in pyramid type or in inverted pyramid type are compared. Based on the benchmarks from ITC’02, experimental results show that for a 5-layer 3D IC, under different constraints, the optimal stacking order can reduce the test costs on average by 13% and 62%, respectively, compared to the pyramid type and inverted pyramid type. Furthermore, with the increase of the stack size, the test costs of the optimized stack order can be decreased.关键词
三维集成电路/绑定中测试成本/堆叠顺序/顺序堆叠/绑定失效Key words
three-dimensional integrated circuit ( 3D IC )/mid-bond test cost/stacking order/sequential stacking/failed bonding分类
信息技术与安全科学引用本文复制引用
倪天明,梁华国,聂牧,卞景昌,黄正峰,徐秀敏,方祥圣..三维集成电路绑定中测试成本缩减的优化堆叠顺序[J].东南大学学报（英文版）,2018,34(2):166-172,7.基金项目
The National Natural Science Foundation of China ( No. 61674048, 61574052, 61474036, 61371025) , the Project of Anhui Institute of Economics and Management ( No. YJKT1417T01) . （ No. 61674048, 61574052, 61474036, 61371025）
