电气传动2019，Vol.49Issue(1)：39-41,52,4.DOI:10.19457/j.1001-2095.dqcd18587
高频感应加热全数字锁相环的分析与FPGA实现
Analysis and Implementation of All-digital Phase-locked Loop in High-frequency Induction Heating Based on FPGA
马莽原 1石新春 1付超 1王慧 1孟建辉1
作者信息
- 1. 华北电力大学新能源电力系统国家重点实验室,河北 保定 071003
- 折叠
摘要
Abstract
The transfer function of all digital phase-locked loop is difficult to obtain because of the non-linear parts. The operation principle of flip-flop all digital phase-locked loop was analyzed and the Z domain closed loop transfer function was obtained by the method of Z domain analysis with proper parameters. The global stability and the steady-state error of the phase-locked loop were studied and the parameter constraints relationship was built. A kind of all digital phase-locked loop was designed by using Xilinx ISim simulation and FPGA logical device ,and the experiment results were given. The results show that this all digital phase-locked loop has a wide frequency range,fast dynamic response,small steady-state error and certain application value.关键词
高频感应加热/全数字锁相环/现场可编程门列阵逻辑器件/Z域分析Key words
high-frequency induction heating/all digital phase-locked loop(ADPLL)/field programmable gate array(FPGA)logical device/Z domain analysis分类
信息技术与安全科学引用本文复制引用
马莽原,石新春,付超,王慧,孟建辉..高频感应加热全数字锁相环的分析与FPGA实现[J].电气传动,2019,49(1):39-41,52,4.
