首页|期刊导航|高技术通讯（英文版）|Parallelization of intra prediction algorithm based on array processor

Parallelization of intra prediction algorithm based on array processor

Zhu Yun Jiang Lin Shi Pengfei Xie Xiaoyan Shen Xubang

高技术通讯（英文版）2019，Vol.25Issue(1)：74-80,7.

高技术通讯（英文版）2019，Vol.25Issue(1)：74-80,7.DOI:10.3772/j.issn.1006-6748.2019.01.010

Parallelization of intra prediction algorithm based on array processor

Zhu Yun ¹Jiang Lin ²Shi Pengfei ³Xie Xiaoyan ³Shen Xubang⁴

作者信息

1. School of Microelectronics, Xidian University, Xi'an 710071, P. R. China
2. Xi'an University of Science and Technology, Xi'an 710054, P. R. China
3. School of Computer Science and Technology, Xi'an University of Posts and Telecommunications, Xi'an 710121, P. R. China
4. Xi'an Microelectronic Technology Research Institute, Xi'an 710065, P. R. China
折叠

摘要

关键词

high-efficiency video coding ( HEVC)/intra prediction/parallelization mapping

Key words

high-efficiency video coding ( HEVC)/intra prediction/parallelization mapping

引用本文复制引用

Zhu Yun,Jiang Lin,Shi Pengfei,Xie Xiaoyan,Shen Xubang..Parallelization of intra prediction algorithm based on array processor[J].高技术通讯（英文版）,2019,25(1):74-80,7.

基金项目

Supported by the National Natural Science Foundation of China (No. 61772417,61634004,61602377,61272120), the Shaanxi Provincial Co-ordination Innovation Project of Science and Technology (No. 2016KTZDGY02-04-02) and the Shaanxi Provincial key R&D plan (No. 2017GY-060). （No. 61772417,61634004,61602377,61272120）

高技术通讯（英文版）

OAEI

ISSN：1006-6748

访问量0

下载量0

段落导航