红外与毫米波学报2019，Vol.38Issue(1)：61-67,96,8.DOI:10.11972/j.issn.1001-9014.2019.01.011
一种片上集成模拟信号累加结构的CMOS-TDI传感器噪声建模与分析
Noise analysis of a CMOS TDI sensor with on chip signal accumulation in analog domain
摘要
Abstract
This article proposes a 16-stage on-chip analog accumulation circuit architecture to realize time delay integration ( TDI). The accumulation unit is based on charge amplifiers. The temporal noise on the analog signal path of the circuit structure is analyzed to enhance the noise performance, and furthermore the model of thermal noise suitable for the TDI process is given. The analysis revealed that the total thermal noise is composed of charge transfer noise and direct sampled noise, according to different stages of accumulators. The relations of each noise component versus circuit gain and corresponding method to suppress it are given. Finally, a 16 × 256 test chip is taped out under the 0. 5 μm CIS process, and test results indicate the improvement of 11. 22 dB in SNR at the 16 TDI stages.关键词
CMOS图像传感器/时间延迟积分/信噪比/片上模拟域/噪声模型Key words
CIS/TDI/SNR/on-chip analog domain/noise model分类
信息技术与安全科学引用本文复制引用
计成,陈永平..一种片上集成模拟信号累加结构的CMOS-TDI传感器噪声建模与分析[J].红外与毫米波学报,2019,38(1):61-67,96,8.基金项目
国家自然科学基金(61874127) （61874127）
