西安电子科技大学学报（自然科学版）2019，Vol.46Issue(1)：112-116,5.DOI:10.19665/j.issn1001-2400.2019.01.018
一种高性能的全数字锁相环设计方案
Design scheme for an all-digital phase locked loop with a high performance
摘要
Abstract
Aiming at the fact that a complex scheme is needed when the two frequencies in the phase locked loop are close to each other or have an approximate integer multiple relationship and the traditional analog phase locked loop is unsuitable for integration and on chip implementation,an all-digital phase locked loop is proposed,which is mainly composed of analog to digital converters,an all-digital phase detector,a digital low pass filter and a digitally controlled oscillator.The analog to digital converters'quantization errors have been greatly suppressed by using the clock cursor effect and digital edge effect and an all-digital phase locked loop with a high performance is achieved.Experiment indicates the correctness of the design scheme and shows that the proposed loop has characteristics of high precision and low noise.关键词
数字锁相环/边沿效应/全数字式鉴相器/数控振荡器Key words
digital phase locked loop/edge effect/all-digital phase detector/digitally controlled oscillator分类
信息技术与安全科学引用本文复制引用
屈八一,程腾,俞东松,李智奇,周渭,李珊珊,刘立东..一种高性能的全数字锁相环设计方案[J].西安电子科技大学学报（自然科学版）,2019,46(1):112-116,5.基金项目
国家自然科学基金(11773022,11873039,61701043) （11773022,11873039,61701043）
中央高校基本科研业务费专项资金(301824171002) （301824171002）
长安大学大学生创新创业训练计划(201810710050) （201810710050）
