半导体学报（英文版）2020，Vol.41Issue(10)：33-37,5.DOI:10.1088/1674-4926/41/10/102105
Design, modelling, and simulation of a floating gate transistor with a novel security feature
Design, modelling, and simulation of a floating gate transistor with a novel security feature
H.Zandipour 1M.Madani2
作者信息
- 1. Department of Physics, Georgia Southern University, Savannah, GA 31419, USA
- 2. Department of Electrical Engineering, University of Louisiana at Lafayette, Lafayette, LA 70504, USA
- 折叠
摘要
关键词
floating gate transistor (FGT)/scanning capacitance microscopy (SCM)/metal-oxide-semiconductor (MOS) capacitance/non-volatile memory (NVM)/reverse engineeringKey words
floating gate transistor (FGT)/scanning capacitance microscopy (SCM)/metal-oxide-semiconductor (MOS) capacitance/non-volatile memory (NVM)/reverse engineering引用本文复制引用
H.Zandipour,M.Madani..Design, modelling, and simulation of a floating gate transistor with a novel security feature[J].半导体学报（英文版）,2020,41(10):33-37,5.
