强激光与粒子束2021，Vol.33Issue(10)：71-78,8.DOI:10.11884/HPLPB202133.210316
电磁脉冲对CMOS与非门的干扰和损伤效应与机理
Upset and damage effects and mechanisms of CMOS NAND gate caused by electromagnetic pulses
摘要
Abstract
A two-dimensional electrothermal model of CMOS NAND gate is established by Sentaurus-TCAD, and the upset and damage effects and mechanisms of CMOS NAND gate are studied with the injection of electromagnetic pulse. The results show that under EMP injection, the output voltage and internal peak temperature of the device show a periodic "decline-rise". After the EMP is removed, the output voltage stays at an abnormal value, the PMOS source current increases, the temperature keeps rising, and finally burn-out occurs in the PMOS source, due to the latch-up effect inside the device. As the pulse-width increases, the damage power threshold decreases and the damage energy threshold increases. The relationship between the pulse-width τ, the damage power threshold P and the damage energy threshold E is obtained by data fitting. The results can be used to evaluate the damage effect of EMP and provide guidance for device-level EMP anti-damage reinforcement design.关键词
CMOS与非门/电磁脉冲/干扰效应/损伤效应/脉宽效应Key words
CMOS NAND/electromagnetic pulse/upset effect/damage effect/pulse-width effect分类
信息技术与安全科学引用本文复制引用
孙毅,柴常春,刘彧千,李福星,杨银堂..电磁脉冲对CMOS与非门的干扰和损伤效应与机理[J].强激光与粒子束,2021,33(10):71-78,8.基金项目
supported by National Natural Science Foundation of China(61974116) （61974116）
