原子能科学技术2022，Vol.56Issue(4)：758-766,9.DOI:10.7538/yzk.2021.youxian.0733
SRAM单粒子锁定效应电路级防护设计研究
Research on Circuit Level Protection Design of SRAM Single Event Latch-up Effect
摘要
Abstract
SRAM with high density CMOS technology is extremely sensitive to single event latch-up，so it is necessary to adopt corresponding protection strategies in space applications. For COTS with reduced radiation resistance，circuit level protection becomes an important part to improve system reliability. A series of single event latch-up effect tests were carried out on CY62167DV30LL SRAM of CYPRESS Company by using laser single event effect test device. Through the linear fitting of the experimental results，the holding voltage of the SRAM is 1.5-1.6 V，and the holding current is 9.9-11.2 mA. According to the holding current，holding voltage，working current and working voltage，judge whether circuit level protection can be adopted. Two circuit level protection methods of power supply current limiting and divider resistor were proposed，and the value range of power supply current limiting and divider resistor were calculated quantitatively. In the previous literature，resistor is only used as a means of current limiting after latch-up trigger，which can not prevent the device from latch-up. It is found that the divider resistor can also achieve the purpose of preventing the latch-up under certain conditions. The two protection methods were verified by pulse laser test.关键词
单粒子锁定/静态随机存储器/脉冲激光/电路级防护Key words
single event latch-up/static random access memory/pulse laser/circuit level protection分类
信息技术与安全科学引用本文复制引用
吴昊,朱翔,韩建伟,上官士鹏,马英起,李悦,赵旭,杨涵..SRAM单粒子锁定效应电路级防护设计研究[J].原子能科学技术,2022,56(4):758-766,9.基金项目
中国科学院战略性先导科技专项(XDA17010301) （XDA17010301）
国防科工局技术基础科研项目(JSHS2019203B001) （JSHS2019203B001）
